The systems and methods described herein relate to debugging computing systems and, more particularly, to debugging a target computing system replicating target virtual memory translation on a host computer and debugging on the host.
As computing technology has advanced, the size of computer software applications and the operating systems that run them has grown larger and larger. As the size of the software has increased, so had the demand that is placed on the memory required to support these programs. To deal with the need for an increased number of addressed memory space, the concept of virtual memory was developed. Today, virtually all modem operating systems provide a form of virtual memory to applications.
One newly developed operating system that utilizes virtual memory management is the WINDOWS CE operating system produced by MICROSOFT CORP. WINDOWS CE is a lightweight operating system that is ideal for use in PDAs (Personal Digital Assistants), hand-held computers, palm computers, electronic appliances and the like. WINDOWS CE provides a page-based virtual memory management scheme that allows applications to realize a 32-bit linear address space for four (4) gigabytes (GB) of memory.
A system that utilizes a virtual memory scheme poses a particular problem when the system fails and an attempt is made to debug the system. To debug a system, a software program is used to examine the contents of the system""s memory and registers to determine a problem with a system. Debuggers require that a virtual memory-based system that is being debugged be operational because the debugging software at least requires the CPU to execute the software. However, there are situations in which the system is not operational, i.e., the CPU will not execute the debugging code, where it is necessary or desirable to execute debugging code to determine the cause of a system fault. Such a situation arises when using hardware-assisted debugging equipment that completely freezes the system in order to debug it, or when a snapshot of the system is taken to be debugged at a later time (this is referred to as xe2x80x9cpost-mortemxe2x80x9d debugging).
When such a situation arises, it is impossible to rely on the kernel of the operating system to handle a page fault exception to load a missing page when a virtual memory location not currently loaded is accessed for debugging purposes.
Systems and methods are described herein that provide a means for a host computer to describe a translation equivalent of one typically performed by CPU table look-aside buffer (TLB) registers of a target computer, after the kernel of the target computer has added the mapping of a page required by the debugger, in the CPU TLB. A host-side application locally replicates the mechanism normally used by the kernel of the target computer to map a virtual address into a physical address. After such a translation is accomplished on the host computer, debugging can be performed on the host computer.
The host-side virtual to physical address translation assumes the following environment:
(1) The target system is running on a CPU that supports fixed paged memory management;
(2) The target system is running an operating system that enables and uses the paged memory management;
(3) The target operating system memory management is table driven or has hard-coded logic; and
(4) The tables used by the target operating system memory management (if applicable) are located either in a known address range of physical memory, or in a known address range of the virtual memory whose pages have been locked (so their addresses are translatable by looking up the current CPU TLB).
In accordance with the present invention, the host-side virtual to physical address translation performs the following major tasks:
(1) determining if the memory management of the CPU is enabled or not (in which case the following tasks are not necessary);
(2) locating the data (tables) used by the kernel of the target system directly to perform the translation;
(3) replicating locally the data (tables) used by the kernel of the target system to perform the translation;
(4) checking the validity of the data (tables) used by the kernel of the target system to perform the translation;
(5) in the case that the data (tables) used by the kernel of the target system to perform the translation are valid, they can be used to perform the translation on the host side; and
(6) cache the data for future use (optional).